AxlIoPort — x86 I/O port access

Public wrappers around the x86 in / out instruction family for legacy hardware that hasn’t moved to MMIO (CMOS, SuperIO, IPMI KCS interfaces, port-based ACPI PM blocks).

Build-gated to x86 — declarations expand to nothing on AArch64 so wrong-arch usage fails at link time rather than silently no-op’ing.

API Reference

x86 architectural I/O port access.

Public wrappers around the in/out instruction family. These are primitive accessors — IO port reads on x86 cannot fail at the architectural level, so they return the value directly rather than a status code.

Build-gated to x86 only. On AARCH64 (or any non-x86 target) the declarations expand to nothing, so call sites that haven’t been arch-gated themselves fail at compile time rather than silently returning a no-op value at runtime — wrong-arch usage surfaces at build time, which is what we want.

Typical use is for legacy hardware that hasn’t moved to MMIO: SuperIO config (0x2E/0x2F), CMOS (0x70/0x71), 8042 keyboard controller, ACPI PM block GPE registers (where the FADT advertises them as port-based), IPMI KCS BMC interfaces.